Skew-Tolerant Circuit DesignElsevier, 16 de jun. de 2000 - 300 páginas As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.
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De dentro do livro
Resultados 1-5 de 91
... Static Circuits 12 Domino Circuits 14 1.4.1 Domino Gate Operation 15 1.4.2 Traditional Domino Clocking 18 1.4.3 Skew-Tolerant Domino 20 Case Studies 22 1.5.1 Sequencing Overhead in a Static ASIC 23 1.5.2 Sequencing Overhead in the Alpha ...
... Circuits 67 Skew-Tolerant Domino Timing 68 3.1.1 General Timing Constraints 69 3.1.2 Clock Domains 72 3.1.3 Fifty ... Circuit Methodology 103 Static/Domino Interface 105 4.1.1 Latch Placement 105 4.1.2 Static-to-Domino Interface 110 ...
... static circuits use transparent latches in place of edge-triggered flip-flops to avoid budgeting clock skew and to permit time borrow to balance logic between cycles. Skew-tolerant domino circuits use multiple overlapping clocks to ...
... static CMOS logic. Unfortunately, static CMOS logic is inadequate to meet timing objectives of the highest-performance systems. Therefore, designers turn to domino circuits, which offer greater speed. Unfortunately, traditional domino ...
... static CMOS circuits are often too slow, so domino gates are employed. In Chapter 3, we look at skewtolerant domino design and timing issues. A practical methodology must efficiently combine both static and domino components, so Chapter ...
Conteúdo
1 | |
35 | |
Chapter 3 Domino Circuits | 67 |
Chapter 4 Circuit Methodology | 103 |
Chapter 5 Clocking | 143 |
Chapter 6 Timing Analysis | 161 |
Chapter 7 Conclusions | 193 |
Timing Constraints | 199 |
Solutions to EvenNumbered Exercises | 203 |
Bibliography | 211 |
Index | 219 |
About the Author | 224 |
Outras edições - Ver todos
Skew-Tolerant Circuit Design David Harris,David Lewis Harris,David Money Harris Visualização parcial - 2001 |