Skew-Tolerant Circuit DesignElsevier, 16 de jun. de 2000 - 300 páginas As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.
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... Skew-Tolerant Static Circuits 12 Domino Circuits 14 1.4.1 Domino Gate Operation 15 1.4.2 Traditional Domino Clocking 18 1.4.3 Skew-Tolerant Domino 20 Case Studies 22 1.5.1 Sequencing Overhead in a Static ASIC 23 1.5.2 Sequencing ...
... Domino Circuits 67 Skew-Tolerant Domino Timing 68 3.1.1 General Timing Constraints 69 3.1.2 Clock Domains 72 3.1.3 Fifty-Percent Duty Cycle 74 3.14 Single Gate per Phase 75 3.1.5 Min-Delay Constraints 75 3.1.6 Recommendations and Design ...
... Skew 163 Timing Analysis with Clock Skew 166 6.2.1 Single Skew Formulation 167 6.2.2 Exact Skew Formulation 168 6.2.3 Clock Domain Formulation 170 6.2.4 Example 174 Extension to Flip-Flops and Domino Circuits 175 6.3.1 Flip-Flops 175 6.3.2.
... logic and edgetriggered flip-flops must budget this clock skew in every clock cycle. Worse yet, aggressive systems attempting to use domino circuits for greater speed budget this clock skew in every half-cycle, or twice in every clock ...
... skew-tolerant circuit techniques. Of course, the book will also be of use to advanced undergraduate and graduate students ... domino circuits into a broader discussion of skew-tolerant circuit design that integrated best practices of ...
Conteúdo
1 | |
35 | |
Chapter 3 Domino Circuits | 67 |
Chapter 4 Circuit Methodology | 103 |
Chapter 5 Clocking | 143 |
Chapter 6 Timing Analysis | 161 |
Chapter 7 Conclusions | 193 |
Timing Constraints | 199 |
Solutions to EvenNumbered Exercises | 203 |
Bibliography | 211 |
Index | 219 |
About the Author | 224 |