Digital Design and Fabrication

Capa
Vojin G. Oklobdzija
CRC Press, 19 de dez. de 2017 - 656 páginas

In response to tremendous growth and new technologies in the semiconductor industry, this volume is organized into five, information-rich sections. Digital Design and Fabrication surveys the latest advances in computer architecture and design as well as the technologies used to manufacture and test them. Featuring contributions from leading experts, the book also includes a new section on memory and storage in addition to a new chapter on nonvolatile memory technologies.

Developing advanced concepts, this sharply focused book—

  • Describes new technologies that have become driving factors for the electronic industry
  • Includes new information on semiconductor memory circuits, whose development best illustrates the phenomenal progress encountered by the fabrication and technology sector
  • Contains a section dedicated to issues related to system power consumption
  • Describes reliability and testability of computer systems
  • Pinpoints trends and state-of-the-art advances in fabrication and CMOS technologies
  • Describes performance evaluation measures, which are the bottom line from the user’s point of view
  • Discusses design techniques used to create modern computer systems, including high-speed computer arithmetic and high-frequency design, timing and clocking, and PLL and DLL design

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Conteúdo

Chapter 1 Trends and Projections for the Future of Scaling and Future Integration Trends
1-1
Chapter 2 CMOS Circuits
2-1
Chapter 3 HighSpeed LowPower Emitter Coupled Logic Circuits
2-77
Chapter 4 PricePerformance of Computer Technology
4-1
Memory and Storage
4-21
Chapter 5 Semiconductor Memory Circuits
5-1
Chapter 6 Semiconductor Storage Devices in Computing and Consumer Applications
6-1
Design Techniques
6-19
Chapter 14 Techniques for Leakage Power Reduction
14-1
Chapter 15 Dynamic Voltage Scaling
15-1
Chapter 16 Lightweight Embedded Systems
16-1
Chapter 17 LowPower Design of Systems on Chip
17-1
Chapter 18 ImplementationLevel Impact on LowPower Design
18-1
Chapter 19 Accurate Power Estimation of Combinational CMOS Digital Circuits
19-1
Chapter 20 ClockPowered CMOS for EnergyEfficient Computing
20-1
Testing and Design for Testability
20-27

Chapter 7 Timing and Clocking
7-1
Chapter 8 MultipleValued Logic Circuits
8-1
Chapter 9 FPGAs for Rapid Prototyping
9-1
Chapter 10 Issues in HighFrequency Processor Design
10-1
Chapter 11 Computer Arithmetic
11-1
Design for Low Power
11-39
Chapter 12 Design for Low Power
12-1
Chapter 13 LowPower Circuit Technologies
13-1
Current Practices and Challenges for Tomorrow
21-1
Chapter 22 Test Technology for Sequential Circuits
22-1
Chapter 23 Scan Testing
23-1
Chapter 24 ComputerAided Analysis and Forecast of Integrated Circuit Yield
24-1
Index
24-27
Back cover
24-43
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Página 1-14 - Ne Na Mg Al Si P S Cl Ar K Ca Sc Ti V Cr Mn Fe Co Ni Cu Zn Ga Ge As Se Br Kr Rb Sr Y Zr Nb Mo Tc Ru Rh Pd Ag Cd In Sn Sb Te 1 Xe Cs Ba La...
Página 1-30 - L. Manchanda, ML Green, RB van Dover, MD Morris, A. Kerber, Y. Hu, J.-P. Han, PJ Silverman, TW Sorsch, G. Weber, V. Donnelly, K. Pelhos, F. Klemens, NA Ciampa, A. Kornblit, YO Kim, JE Bower, D. Barr, E. Ferry, D. Jacobson, J. Eng, B. Busch, and H. Schulte, "Si-doped aluminates for high temperature metal-gate CMOS: Zr-Al-Si-O, a Novel gate dielectric for low power applications,
Página 1-14 - K Ca Sc Ti V Cr Mn Fe Co Ni Cu Zn Ga Ge As Se Br Kr 4 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 Rb Sr Y Zr...
Página 8-24 - This research was supported in part by grants from the National Science Foundation (GS-32065) and the Spencer Foundation.
Página 1-28 - Sub-50 nm gate length n-MOSFETs with 10 nm phosphorus source and drain junctions,
Página 1-29 - HS Momose, T linuma, I Kunishima, K Suguro, H Okano, I Katakabe, H Nakajima, M Tsuchiaki, M Ono, Y Katsumata, and H Iwai. A NiSi salicide technology for advanced logic devices.
Página 14-16 - S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, S. Shigematsu, and J. Yamada, "1-V Power Supply HighSpeed Digital Circuit Technology with Multithreshold- Voltage CMOS,

Sobre o autor (2017)

Vojin G. Oklobdzija

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